MACHLV210-12JC specifiche: High density EE CMOS programmable logic, 64 macrocells, 32 outputs, 64 flip-flops; 2 clock choices, 12ns

MACHLV210-12JC simili

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MACHLV210-12JC datasheet e spec

Fabbricante : Lattice

Viaggi : PLCC

Pins : 44

Temperatura : Min 0 °C | Max 70 °C

Dimensione : 243 KB

Applicazione : High density EE CMOS programmable logic, 64 macrocells, 32 outputs, 64 flip-flops; 2 clock choices, 12ns