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M5LV-256/68-7VI specifiche: 7ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
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M5LV-256/68-7VI datasheet e spec
Fabbricante : Lattice
Viaggi : TQFP
Pins : 100
Temperatura : Min -40 °C | Max 85 °C
Dimensione : 1126 KB
Applicazione : 7ns fifth generation MACH architecture CPLD (Complex Programmable Logic Device)
M5LV-256/68-7VI PDF Download