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PLSI3256-50LG specifiche: High density programmable logic, 128 I/O pins, 11000 PLD gates, 384 registers, 57MHz
PLSI3256-50LG simili
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PLSI3256-50LG datasheet e spec
Fabbricante : Lattice
Viaggi : CPGA
Pins : 167
Temperatura : Min 0 °C | Max 70 °C
Dimensione : 1126 KB
Applicazione : High density programmable logic, 128 I/O pins, 11000 PLD gates, 384 registers, 57MHz
PLSI3256-50LG PDF Download