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SN74LS112AN specifiche: Dual JK negative edge-triggered flip-flop
SN74LS112AN simili
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- Quad 2-input NAND gate
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- 4-bit latch
SN74LS112AN datasheet e spec
Fabbricante : Motorola
Viaggi : PDIP
Pins : 16
Temperatura : Min 0 °C | Max 70 °C
Dimensione : 161 KB
Applicazione : Dual JK negative edge-triggered flip-flop
SN74LS112AN PDF Download